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FAN8034
6-CH Motor Driver
Features
* * * * * * * * 5-CH balanced transformerless (BTL) driver 1-CH (forward-reverse) control DC motor driver Operating supply voltage (4.5 V ~ 13.2 V) Built-in thermal shut down circuit (TSD) Built-in channel mute circuit Built-in power save mode circuit Built-in TSD monitor circuit Built-in 2-OP AMPs
Description
The FAN8034 is a monolithic integrated circuit suitable for a 6-ch motor driver which drives the tracking actuator, focus actuator, sled motor, spindle motor, and tray motor of the CDP/CAR-CD/DVDP systems.
48-QFPH-1414
Typical Application
* * * * Compact disk player Video compact disk player Car compact disk player Digital video disk player
Ordering Information
Device FAN8034 Package 48-QFPH Operating Temperature -35C ~ +85C
Rev. 1.0.1
(c)2000 Fairchild Semiconductor International
FAN8034
Pin Assignments
OPOUT1
OPOUT2
OPIN1-
OPIN1+
OPIN2+
OPIN2-
PVCC1
SVCC
VREF
FIN (GND)
48 IN1-
47
46
45
44
43
42
41
40
39
38
37 DO1-
1
DO1+ 36 35
IN1+
OUT1
2
PS
DO2+ DO2-
IN2+ 3
34
IN2- 4 OUT2 5 IN3+ 6
33
PGND1
32 31
DO3+
DO3-
FIN (GND)
FAN8034
7 30
FIN (GND)
IN3- OUT3 IN4+
DO4+ DO4-
8
29
9
28
DO5+
IN4- 10 OUT4 11
27
DO5-
26 PGND2 DO6+
IN5+ 12 13 IN5- 14 OUT5 15 CTL 16 FWD 17 REV 18 SGND (GND) FIN 19 MUTE12 20 MUTE34 21 MUTE5 22 TSD-M 23 PVCC2 24 DO6-
25
2
FAN8034
Pin Definitions
Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Pin Name IN1- OUT1 IN2+ IN2- OUT2 IN3+ IN3- OUT3 IN4+ IN4- OUT4 IN5+ IN5- OUT5 CTL FWD REV SGND MUTE12 MUTE34 MUTE5 TSD-M PVCC2 DO6- DO6+ PGND2 DO5- DO5+ DO4- DO4+ DO3- DO3+ I/O I O I I O I I O I I O I I O I I I I I I O O O O O O O O O CH1 op-amp input (-) CH1 op-amp output CH2 op-amp input (+) CH2 op-amp input (-) CH2 op-amp output CH3 op-amp input (+) CH3 op-amp input (-) CH3 op-amp output CH4 op-amp input (+) CH4 op-amp input (-) CH4 op-amp output CH5op-amp input (+) CH5 op-amp input (-) CH5 op-amp output CH6 motor speed control CH6 forward input CH6 reverse input Signal ground Mute for CH1,2 Mute for CH3,4 Mute for CH5 TSD monitor Power supply voltage 2 (For CH5, CH6) CH6 drive ouptut (-) CH6 drive output (+) Power ground 2 (FOR CH5, CH6) CH5 drive ouptut (-) CH5 drive output (+) CH4 drive ouptut (-) CH4 drive output (+) CH3 drive ouptut (-) CH3 drive output (+) Pin Function Descrition
3
FAN8034
Pin Definitions (Continued)
Pin Number 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pin Name PGND1 DO2- DO2+ DO1- DO1+ PVCC1 PS OPOUT2 OPIN2- OPIN2+ VREF SVCC OPOUT1 OPIN1- OPIN1+ IN1+ I/O O O O O I O I I I O I I I CH3 drive ouptut (-) CH3 drive output (+) CH3 drive ouptut (-) CH3 drive output (+) Power supply voltage 1 (For CH1, CH2, CH3, CH4) Power save Normal op-amp2 output Normal op-amp2 input (-) Normal op-amp2 input (+) Bias voltage input Signal & OPAMPs supply voltage Normal op-amp1 output Normal op-amp1 input (-) Normal op-amp1 input (+) CH1 op-amp intput (+) Pin Function Descrition Power ground 1 (For CH1, CH2, CH3, CH4)
4
FAN8034
Internal Block Diagram
IN1+ 48 OPIN1+ OPIN1- OPOUT1 SVCC 47 46 - + 45 44 VREF 43 -+
-
FIN (GND)
OPIN2+ OPIN2- OPOUT2 42 41 - + 40
PS 39
PVCC1 38
DO1+ 37
IN1-
1
POWER SAVE
36
DO1-
OUT1
2
+
+ -
35
DO2+
IN2+
3
+ - -
34 DO2-
+
IN2-
4
+ -
33
+ -
PGND1
OUT2
5
- +
32
DO3+
IN3+
6
+ -
31
+ - -
DO3-
FIN (GND) T.S.D IN3- 7 + -
FIN (GND)
+
30
+ -
DO4+
OUT3
8
- +
29
DO4-
IN4+
9 + -
+ -
28
DO5+
IN4-
10 D D
27
DO5-
OUT4
11
S W
M S C
+ -
MUTE12
26
PGND2
IN5+
12
25
MUTE34 MUTE5 TSD-M
DO6+
13 IN5- Note.
14 OUT5
15 CTL
16 FWD
17 REV
18 SGND
19
20
21
22
23
24
(GND) MUTE12 MUTE34 MUTE5 TSD-M PVCC2 DO6- FIN
Detailed circuit of the output power amp 40K 10K From input opamp 10K Pref 10K - + 40K 40K + - 10K 40K Pref1 is almost PVCC1 / 2 Pref2 is almost PVCC2 / 2 DO-
DO+
Vref
5
FAN8034
Equivalent Circuits
Description Pin No Internal Circuit
VCC
VCC
2K 2K
1 7 13 4 10 46
BTL INPUT
1,4,7,10,13,46 3,6,9,12,47,48
3 9 47
6 12 48
VCC
5K
42
VCC
5K
41
OP AMP INPUT
41,42
VCC
1K 5K
VCC
VREF
43
43
1K
VCC
VCC
OUTPUT
2,5,8,11,14,45
2 8 14
5 11 45
6
FAN8034
Equivalent Circuits
Description Pin No Internal Circuit
VCC VCC
OP OUT
40
40
0.05k 0.05k
VCC
20K
MUTE1234
19, 20, 21
19 20 21
50K 50K
VCC
MUTE5
21
21
1K
39K
TSD-M
22
22
20k
7
FAN8034
Equivalent Circuits
Description Pin No Internal Circuit
VCC
100k
PS
39
39
50K 50K
VCC
30K
FWD,REV
16,17
17 16
30K 30K
30K
freewheeling diode
vcc VCC
VCC
27
28 30 32 35 37
OUTPUT
27,28,29,30,31, 32,34,35,36,37
29 31 40 34 36
40K 7K
parastic diode
freewheeling diode VCC vcc
VCC
OUTPUT
24,25
24
25
60K 7K
parastic diode
8
FAN8034
Absolute Maximum Ratings ( Ta=25C)
Parameter Maximum supply voltage Power dissipation Operating temperature Storge temperature Maximum output current Symbol SVCCMAX PVCC1 PVCC2 PD TOPR TSTG IOMAX Value 18 18 18 3note -35 ~ +85 -55 ~ +150 1 Unit V V V W C C A
Notes: 1. When mounted on 70mm x 70mm x 1.6mm PCB 2. Power dissipation reduces 24mW/C for using above TA = 25C 3. Do not exceed PD and SOA
Pd (mW) 3,000 2,000
1,000 0 0 25 50 75 100 125 150 175 Ambient temperature, Ta [C]
Recommended Operating Conditions ( Ta=25C)
Parameter Operating supply voltage Symbol SVCC PVCC1 PVCC2 Min. 4.5 4.5 4.5 Typ. Max. 13.2 13.2 13.2 Unit V V V
9
FAN8034
Electrical Characteristics
(SVCC =5V, PVCC1 = PVCC2 = 11V, TA = 25C, unless otherwise specified) Parameter Quiescent circuit current Power save on current Power save on voltage Power save off voltage Mute12 on voltage Mute12 off voltage Mute34 on voltage Mute34 off voltage Mute5 on voltage Mute5 off voltage BTL DRIVER CIRCUIT Output offset voltage Maximum output voltage 1 Maximum output voltage 2 Closed-loop voltage gain Ripple rejection ratio Slew rate INPUT OPAMP CIRCUIT Input offset voltage 1 Input bias current 1 High level output voltage 1 Low level output voltage 1 Output sink current 1 Output source current 1 Common mode input range1 Open Loop voltage gain 1 Ripple rejection ratio 1 Common mode rejection ratio 1 Slew rate 1 VOF1 IB1 VOH1 VOL1 ISINK1 ISOU1 Vicm1 GVO1 RR1 CMRR1 SR1 VIN=-75dB VIN=-20dB, f=120Hz VIN=-20dB Square, Vout=3Vp-p RL=50 RL=50 -10 4.4 1 1 -0.3 4.7 0.2 2 2 80 65 80 1.5 +10 400 0.5 4.0 mV nA V V mA mA V dB dB dB V/s VOO VOM1 VOM2 AVF RR SR VIN=2.5V RL=10 RL=18 VIN=0.1Vrms VIN=0.1Vrms, f=120Hz Square, Vout=4Vp-p -100 7.5 8.5 16.8 1 9.0 9.5 18 60 2 +100 19.2 mV V V dB dB V/s Symbol ICC
*note
Conditions Under no-load Under no-load Pin39=Variation Pin39=Variation Pin19=Variation Pin19=Variation Pin20=Variation Pin20=Variation Pin21=Variation Pin21=Variation
Min. 2 2 2 2
Typ. 30 -
Max. 1 0.5 0.5 0.5 0.5 -
Unit mA mA V V V V V V V V
IPS
VPSON VPSOFF VMON12 VMOFF12 VMON34 VMOFF34 VMON5 VMOFF5
Note: 1. when the voltage of the pin39 is below 0.5V then Power save circuit cuts off the main bias current, so that the whole circuts are disabled. (whole circuits are "drive circuit ", " input op amp circuit " and " normal op amp circuit ")
10
FAN8034
Electrical Characteristics (Continued)
(SVCC = 5V, PVCC1 = PVCC2 = 11V, TA = 25C, unless otherwise specified) Parameter NORMAL OP AMP CIRCUIT 1 Input offset voltage 2 Input bias current 2 High level output voltage 2 Low level output voltage 2 Output sink current 2 Output source current 2 Common mode input range 2 Open loop voltage gain 2 Ripple rejection ratio 2 Common mode rejection ratio 2 Slew Rate 2 NORMAL OP AMP CIRCUIT 2 Input offset voltage 3 Input bias current 3 High level output voltage 3 Low level output voltage 3 Output sink current 3 Output source current 3 Open loop voltage gain 3 Ripple rejection ratio 3 Common mode rejection ratio 3 Slew rate 3 TRAY DRIVE CIRTUIT Input High Level Voltage Input Low Level Voltage Output voltage 1 Output voltage 2 Output load regulation Output offset voltage 1 Output offset voltage 2 VIH VIL VO1 VO2 VRL VOO1 VOO2 PVCC2=11V, VCTL=3V, RL=45 PVCC2=13V, VCTL=4.5V, RL=45 VCTL=3V, IL=100mA 400mA VIN=5V, 5V VIN=0V, 0V 2 -40 -40 6 9 300 0.5 700 +40 +40 V V V V mV mV mV VOF3 IB3 VOH3 VOL3 ISINK3 ISOU3 GVO3 RR3 CMRR3 SR3 RL=50 RL=50 VIN=-75dB VIN=-20dB, f=120Hz VIN=-20dB Square, Vout=3Vp-p -15 3 10 10 3.8 1.0 80 65 80 1.5 +15 400 1.5 mV nA V V mA mA dB dB dB V/s VOF2 IB2 VOH2 VOL2 ISINK2 ISOU2 Vicm2 GVO2 RR2 CMRR2 SR2 VIN=-75dB VIN=-20dB, f=120Hz VIN=-20dB Square, Vout=3Vp-p RL=50 RL=50 -10 4.4 2 2 -0.3 4.7 0.2 4 4 80 65 80 1.5 +10 400 0.5 4.0 mV nA V V mA mA V dB dB dB V/s Symbol Conditions Min. Typ. Max. Unit
11
FAN8034
Application Information
1. Thermal Shutdown
* When the chip temperature reaches to 160C by abnormal condition, then the TSD circuit is activated. * This shut down the bias current of the output drivers, and all the output drivers are in cut-off state. Thus the chip temperature begin to decrease. * when the chip temperature falls to 135C, the TSD circuit is deactivated and the output drivers are normally operated. * The TSD circuit has the hysteresis temperature of 25C.
SVCC IREF R1 Q0 R2 Hysteresis Ihys R3
Output driver bias
2. Ch Mute Function
* When the pin19,20,21 is high, the TR Q1 is turned on and Q2 is off, so the bias circuit is enabled. On the other hand, when the pin19,20,21 is Low (GND) , the TR Q1 is turned off and Q2 is on, so the bias circuit is disabled. * That is, this function will cause all the output drivers to be in mute state. * Truth table is as follows; Pin19,20,21 HIGH LOW FAN8034 Mute-off Mute-on
SVCC
Bias blocks (5-Ch BTL and 1-Ch logic loading) Q2
22 Q1
12
FAN8034
3. Power Save Function
* When the pin39 is high, the TR Q3 is turned on and Q4 is off, so the bias circuit is enabled. On the other hand, when the pin39 is Low (GND) , the TR Q3 is turned off and Q4 is on, so the bias circuit is disabled. * That is, this function will cause all the circuit blocks of the chip except for OPAMP to be in the off state. thus the low power quiescent state is established * Truth table is as follows; Pin39 HIGH LOW FAN8034 Power Save Off Power Save On
SVCC Main Bias
21 Q3
Q4
13
FAN8034
4. Tsd Monitor Function
* PIN22 is TSD monitor pin which detects the state of the TSD block and generates the TSD-monitor signal. * In normal state Q5 is turned on, so Q6 is turned off. on the otherhand, When the TSD block is is activated then Q5 is turned off, so the voltage of pin22 is low. * Truth table is as follows Tsd Circuit pin22 HIGH LOW FAN8034 Tsd Off Tsd On
5. Focus, Tracking Actuator, Spindle, Sled Motor Drive Part
R2 R1 OPin+ OPin48 1 3 4 6 7 9 12 + - Vin R1 Vp R2 R1 PVCC1(PVCC2) Dp 60k + 62k Qp - Vp - + R2 R2 + - R2 M DON 38 36 33 31 DOP 39 37 34 32
10 13
48
3
6 Vref
9
12 43
* The voltage, Vref is the reference voltage given by the external bias voltage of the pin 43. * The input signal (Vin) through pins 1,4,7, 10 and 13 is amplified one time and then fed to the output stage. (assume that input opamp was used as a buffer) * The total closed loop voltage gain is as follows
Vin = Vref + V DOP = Vp + 4 V DON = Vp - 4 V Vout = DOP - DON = 8 V Vout Gain = 20 log ------------ = 20 log 8 = 18dB V
* If you want to change the total closed loop voltage gain, you must use the input opamp as an amplifier * The output stage is the balanced transformerless (BTL) driver. * The bias voltage Vp is expressed as ;
62k Vp = ( PVCC1 - VDp - VcesatQp ) x ------------------------- + VcesatQp 60k + 62k PVCC1 - VDp + VcesatQp = -------------------------------------------------------------------------- + VcesatQp 1.97
----------
(1)
14
FAN8034
6. Tray, Changer,panel Motor Drive Part
out 1 24
M
out 2 25
D
D
LEVEL SHIFT 6.5V CTL 15 S.W 0 3.25V VCTL M.S.C V(out1,out2)
IN
IN
FWD 16
REV 17
* Rotational direction control The forward and reverse rotational direction is controlled by FWD (pin16) and REV (pin17) and the input conditions are as follows. INPUT FWD H H L L REV H L H L OUT 1 Vp H L OUTPUT OUT 2 Vp L H State Brake Forward Reverse Hign impedance
* Where Vp(Power reference voltage) is approximately about 3.75V at PVCC2=8V ) according to equation (1). * Where out1 pins are pins24 and out2 pins are pins25 * Motor speed control (When SVCC=PVCC2=8V) - The almost maximum torque is obtained when the pin (15(CTL1, 2, 3)) is open. - If the voltage of the pins (15 (CTL)) is 0V, the motor will not operate. - When the control voltage of the pin15 is between 0 and 3.25V, the differential output voltage(V(out1,out2)) is about two times of control voltage. Hence, the control to the differential output gain is two. - When the control voltage is greater than 3.25V, the output voltage is saturated at the 6.5V because of the output swing limitation.
15
FAN8034
Test Circuits
VCC
1 OP IN (+) OP IN (-) OP OUT
50 OP IN (+) OP OUT OP IN (-)
100F 2 + + 1000F RIPPLE
VREF
2.5V
OP IN (+) OP IN (-) OP OUT IN1- 1
48 IN1+
47 OPIN1+
46 OPIN1-
45 OPOUT1
44 SVCC
43 VREF
42 OPIN2+
41 OPIN2-
40 OPOUT2
39 PS
38 PVCC1
37 DO1+ 36 DO1-
RL1
2 OUT1 OP IN (+) OP IN (-) OP OUT 3 IN2+
DO2+ 35 RL2 DO2- 34
4 IN25 OUT2 6 IN3+
PGND1 33 DO3+ 32 RL3 DO3- 31
OP IN (+) OP IN (-) OP OUT
FAN8034
7 IN3- DO4+ 30 RL4 8 OUT3 9 IN4+ 10 IN4- MUTE12 MUTE34 PVCC2 SGND OUT5 FWD DO4- 29 DO5+ 28 RL5 DO5- 27 TSD_M MUTE5 DO6- PGND2 26 25 DO6+ RL7 11 OUT4 IN5+ 12 IN5-
OP IN (+) OP IN (-) OP OUT
OP IN (+) OP IN (-) OP OUT
CTL
13
14
15
16
17
REV
18
19
20
21
22
23
24
IL CTL INA INB
IL
OP-AMP PART
OPIN(+) OPIN(-) OPOUT
A 1 VPULSE 2 VA 3 1
B D 2 VB C 1 2 VCC 3 50 VOUT
16
FAN8034
Typical Application Circuits 1
[Voltage control mode]
SVCC
PVCC1
POWER SAVE FOCUS
48 IN1+ IN1- 1
47 OPIN1+
46 OPIN1-
45 OPOUT1
44 SVCC
43 VREF
42 OPIN2+
41 OPIN2-
40 OPOUT2
39 PS
38 PVCC1
37 DO1+ 36 DO1- TRACKING
2 OUT1 3 IN2+ 4 IN25 OUT2 6 IN3+
DO2+35 DO2- 34
PGND1 33 DO3+ 32 DO3- 31 M SLED
FAN8034
7 IN3- 8 OUT3 9 IN4+ 10 IN4- MUTE12 MUTE34 TSD_M MUTE5 PVCC2 SGND OUT5 11 OUT4 IN5- IN5+ 12 FWD DO4+ 30 DO4- 29 DO5+ 28 M SPINDLE DO5-27 PGND2 DO6- 26 25 DO6+ M TRAY
CTL
REV
13
14
15
16
17
18
19
20
21
22
23
24
pvcc2
PVCC2
SPINDLE MUTE SLED MUTE FOCUS, TRACKING, MUTE
TSD MONITOR
VREF FOCUS TRACKING INPUT INPUT SLED INPUT SPINDLE INPUT
TRAY TRAY CONTROL INPUT
Where TY is tray motor. CG is changer motor PL is panel motor
[SERVO PRE AMP]
[CONTROLLER]
17
FAN8034
Typical Application Circuits 2
[Differential PWM control mode ]
SVCC
PVCC1 POWER SAVE FOCUS
48 IN1+ IN1- 1
47 OPIN1+
46 OPIN1-
45 OPOUT1
44 SVCC
43 VREF
42 OPIN2+
41 OPIN2-
40 OPOUT2
39 PS
38 PVCC1
37 DO1+ 36 DO1- TRACKING M SLED M SPINDLE M TRAY
2 OUT1 3 4 5 IN2+ IN2OUT2
35 DO2+ DO2- 34
PGND1 33 DO3+ 32 DO3- 31
6 IN3+
FAN8034
7 8 9 10 11 IN5+ 12 IN3- OUT3 IN4+ DO4+ 30 DO4- 29 DO5+ 28 DO5-27 MUTE12 MUTE34 MUTE5 TSD_M PVCC2 PGND2 26 DO6- 24 25 DO6+ SGND 18 OUT5
IN4-
OUT4 IN5- FWD 16 CTL REV 17
13
14
15
19
20
21
22
23
PVCC2
SPINDLE MUTE SLED MUTE FOCUS, TRACKING MUTE
pvcc2
TSD MONITOR
VREF FOCUS TRACKING INPUT INPUT SLED INPUT SPINDLE INPUT
TY TRAY CONTROL INPUT
Where TY is tray motor. CG is changer motor PL is panel motor
[SERVO PRE AMP]
[CONTROLLER]
Notes: 1. Radiation pin is connected to the internal GND of the package. 2. Connect the pin to the external GND
18
FAN8034
19
FAN8034
DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.
www.fairchildsemi.com 12/1/00 0.0m 001 Stock#DSxxxxxxxx 2000 Fairchild Semiconductor International
2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

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